| –Data type conversions.–Conditional branch and call–Data load and store operations•The CLA program code can consist of up to eight tasks or interrupt service routines.–The start address of each task is specified by the MVECT registers.–No limit on task size as long as the tasks fit within the CLA program memory space.–One task is serviced at a time through to completion. There is no nesting of tasks.–Upon task completion, a task-specific interrupt is flagged within the PIE.–When a task finishes, the next highest-priority pending task is automatically started.•Task trigger mechanisms:–C28x CPU via the IACK instruction–Task1 to Task7: the corresponding ADC, ePWM, eQEP, or eCAP module interrupt. For example:•Task1: ADCINT1 or EPWM1_INT•Task2: ADCINT2 or EPWM2_INT•Task4: ADCINT4 or EPWM4_INT or EQEPx_INT or ECAPx_INT•Task7: ADCINT7 or EPWM7_INT or EQEPx_INT or ECAPx_INT–Task8: ADCINT8 or by CPU Timer 0 or EQEPx_INT or ECAPx_INT.•Memory and Shared Peripherals:–Two dedicated message RAMs for communication between the CLA and the main CPU.–The C28x CPU can map CLA program and data memory to the main CPU space or CLA space.–The CLA has direct access to the ADC Result registers, comparator registers, and the eCAP,eQEP, and ePWM+HRPWM register |
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